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CHR$128 UDG Mode for the ZX80/ZX81
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ZX81 SUPPORT

Adding internal RAM on the ZX81 between $2000-$3FFF allows redefinition of the
basic 64 character set patterns (character codes 0 to 63). Character codes (128
to 191) are inverse versions of these definitions and are generated by the hardware
of the display mechanism. The mode is invoked by setting the I register to an even
number between $20 to $3E, meaning there are 16 possible table locations:

I Register  Table location
$20         $2000-$21FF
$22         $2200-$23FF
$24         $2400-$25FF
$26         $2600-$27FF
$28         $2800-$29FF
$2A         $2A00-$2BFF
$2C         $2C00-$2DFF
$2E         $2E00-$2FFF
$30         $3000-$31FF
$32         $3200-$33FF
$34         $3400-$35FF
$36         $3600-$37FF
$38         $3800-$39FF
$3A         $3A00-$3BFF
$3C         $3C00-$3DFF
$3E         $3E00-$3FFF

CHR$128 mode extends on this principle by using bit 0 of the I register to
select between two tables of definitions. This allows redefinition of all 128
displayable characters. The pixel pattern table therefore occupies 1K of RAM
within the $2000-$3FFF region on the ZX81. When bit 0 of the I register is 0
then CHR$128 mode only allows the basic 64 characters to be redefined, and when
bit 0 is 1 then all 128 characters can be redefined.

When bit 0 is set to 1, the first 0.5K holds the pixel patterns for the non-
inverted characters, and the second 0.5K holds the pixel patterns for the
inverted characters. Note that the pixel patterns for the 'inverted' characters
need to be stored in inverted form since the ZX81 display mechanism automatically
inverts them due to bit 7 of the character code being set.

With bit 0 set to 1, there are only 8 possible character set table locations:

I Register  Table location
$21         $2000-$23FF
$25         $2400-$27FF
$29         $2800-$2BFF
$2D         $2C00-$2FFF
$31         $3000-$33FF
$35         $3400-$37FF
$39         $3800-$3BFF
$3D         $3C00-$3FFF


ZX80 SUPPORT

The Chroma 80 interface adds CHR$128 mode support to the ZX80, but it does so
in the $C000-$FFFF region since the mirroring of the ROM in the $2000-$3FFF
region cannot be suppressed via the expansion bus.